The subject invention relates to a method and apparatus for control of a stepper motor. More particularly, it relates to a method and apparatus for multiplexed control of a plurality of stepper motors by a data processor through direct memory access channels (hereinafter DMA channels).
The present application is related to, and shares, common elements of disclosure with, commonly assigned application Ser. No. 08/327,249 (E-257) filed on even date herewith.
Stepper motors are well known in the art and typically comprise motors having a pair of coils each of which may be excited independently in either one of two polarities. By applying an appropriate cyclic sequence of exitation patterns to a stepper motor the motor may be controlled to rotate in predetermined angular increments, or "steps".
By proper selection of the appropriate cyclic sequence of exitation patterns (hereinafter referred to as a "step table") a stepper motor may be operated in one of a plurality of modes of operation. These modes include a full-step mode where one of the two motor coils changes polarity at each step repeating the sequence exitation patterns through a four step step table, and a half-step mode wherein one or the other of the two motor coils is selectively de-energized at various steps of an eight step table to rotate the stepper motor in half steps. Other modes of operation of stepper motors are known, but need not be discussed further here for an understanding of the subject invention.
Stepper motors have proven very popular in modern, sophisticated mechanical equipment since, by varying the time between steps in a step table, a stepper motor may be driven through very flexible and highly precise velocity profiles necessary to implement complex mechanical functions such as those carried out by paper handling equipment. To achieve this flexibility in sophisticated applications it has generally been the case that a stepper motor would be controlled by a data processor such as a microprocessor. However, direct program control of a stepper motor by a data processor is a computationally intensive task which will consume an unacceptably large portion of the computational capabilities of a data processor, particularly of a microprocessor.
In the above referenced co-pending application one solution to this problem is provided through the use of DMA channels to control stepper motors. In this application, however, the number of ports for DMA access to the stepper motor limits the number of motors which can be controlled through DMA channels.
Accordingly, it is an object of the subject invention to provide a method and apparatus which will reduce the computational burden on a data processor controlling a stepper motor while still allowing flexible control of the stepper motor, and where the number of stepper motors which may be controlled is not limited to the number of ports for providing DMA access.